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| TECHNICAL DATA PARALLEL INPUT TONE/PULSE DIALER High-Performance Silicon-Gate CMOS The KK91531 provides a 4-bit data input and a handshaking signal to serve as microcomputer interfaces. Under microcomputer control the KK91531 generates both a DTMF signal and a pulse output for telephone dialing. All necessary dual-tone frequencies and dial pulse outputs are derived from the widely used TV crystal standard, providing high accuracy and stability. The required sinusoidal waveform for individual tones is digitally synthesized on the chip, resulting in a waveform with very low total harmonic distortion. * 4-bit parallel data input from microcomputer * TTL compatible inputs and outputs * Uses TV crystal standard (3.58 MHz) to derive all frequencies, providing high accuracy and stability * Operating voltage: 2.5 to 5.5 Volts * Selectable M/B ratio * 10 PPS dial rate * DTMF signaling of digits 0 9, *, #, A, B, C, and D * Pulse signaling of 0 9, *, #, and A * High group tone pre-emphasis: 2 dB * Low total harmonic distortion in DTMF signaling KK91531 ORDERING INFORMATION KK91531N TA = -10 to 70 C PIN ASSIGNMENT LOGIC DIAGRAM PIN 10 = GND PIN 16 = VCC 1 KK91531 PIN DESCRIPTION Pin No. Designation 1 MODE DESCRIPTION Tone mode select input. When this input is high, the tone output and ASK output are normal. When this input is low, a DTMF signal will be generated continuously and any new input data will be ignored. This input affects the tone output mode only. Latch input. When input on this pin changes from low to high (at the rising edge), the KK91531 latches the 4-bit input data and T/P input. The latch input should not be changed back from low to high again until the ASK output falls low, and new data must not be latched while the ASK output is still low. Make/Break ratio select input. This pin is used to select one of two available make/break ratios. A high input selects the 2/3 make/break ratio; a low input selects the 1/23 ratio. This input should be connected to VCC or GND only. Changing the state of this pin when CE is active (low) enables the test mode. Tone/pulse mode select input. This input determines whether tone or pulse mode will be activated. It is latched together with the 4-bit data input. 4-bit data input pins. This 4-bit parallel input is used to receive data generated by the microcomputer. (Input data vs. output signal is shown in table 1.) Valid input data should be presented at these inputs before and during the rising edge of the latch signal. Dial pulse output. The dial pulse output consists of an N-channel open drain device. During dial pulse break periods this output is switched on (sinking current to GND); it is switched off during all other states. Dialing rate is 9.71 PPS and post-digit pause is 823 ms. (The output of this pin during test mode is discussed below.) Negative power supply input. Positive power supply input (operating range 2.5 to 5.5 volts). Oscillator output. Oscillator input. The KK91531 contains an oscillator circuit with the necessary parasitic capacitance and feedback resistor on chip, making it necessary to connect only a standard 3.58 MHz TV crystal across the OSC1 and OSC0 terminals to implement the oscillator function. An external clock input can be applied to the OSC1 pin directly. The oscillator is enabled when the CE input is low. Chip enable input. This input controls the onset of oscillation and serves as the master reset for this device. Acknowledge output. This pin provides an acknowledge signal to the microcomputer. This output is high when the device is ready to dial out the next digit; it falls low immediately after the rising edge of the latch signal. DTMF signal output. This pin consists of an NPN transistor output, with the collector connected to VCC. This pin is also connected to the emitter output. The internally generated DTMF signal is delivered to the base of the NPN transistor and is amplified as the transistor connected in common collector. DTMF signaling output time is 70 ms and the interdigit interval is 70 ms. Typical output impedance of the DTMF signal is 1.25 k, and the hFE of the NPN transistor is at least 30 at IC = 3 mA. 2 LATCH 3 M/B 4 T/P 5-8 D0 - D3 9 DP 10 16 11 12 GND VCC OSC0 OSC1 13 14 CE ASK 15 TONE 2 KK91531 FUNCTIONAL DESCRIPTION Input Data vs. Output Signal Parallel binary on D0 - D3 pins are input from microcomputer. Output signal vs. input data is shown in Table 1: D3 D2 D1 D0 DTMF Signaling PULSE Signal (O/P Pulse No.) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 2 3 4 5 6 7 8 9 * # A B C D Table 1. 10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Forbidden input Input Data vs. Output Signal in Test Mode The KK91531 provides a high speed pulse/tone output for testing consideration. If the M/B input changes state after the KK91531 is enabled, the test mode is initiated and the device will remain in test mode unless disabled. Table 2 shows input data vs. output signal in pulse/tone test mode. Quantity of Pulses D3, D2, D1, D0 Tone O/P Frequencies and Test Mode (Pulse O/P Frequencies and Test Mode, Frequency 480 Hz) Input In Hex Code 0 1 2 3 4 5 6 7 8 Tone Pin O/P 948.0 699.1 1,331.7 1,417.9 1,215.9 1,331.7 766.2 847.4 1,331.7 Unit Hz Hz Hz Hz Hz Hz Hz Hz Hz DP Pin O/P 1,331.7 x 8 1,215.9 x 8 699.1 x 8 699.1 x 8 766.2 x 8 766.2 x 8 1,471.9 x 8 1,215.9 x 8 847.4 x 8 Unit Hz Hz Hz Hz Hz Hz Hz Hz Hz DP Pin O/P 10 1 2 3 4 5 6 7 8 3 KK91531 Input Data vs. Output Signal in Test Mode (Continued) D3, D2, D1, D0 Input In Hex Code 9 A B C D E F Tone O/P Frequencies and Test Mode Tone Oin O/P 1,471.9 1,215.9 1,471.9 1,645.0 1.645.0 1.645.0 1.645.0 Unit Hz Hz Hz Hz Hz Hz Hz DP Pin O/P 847.4 x 8 948.0 x 8 948.0 x 8 699.1 x 8 766.2 x 8 847.4 x 8 948.0 x 8 Unit Hz Hz Hz Hz Hz Hz Hz Quantity of Pulses (Pulse O/P Frequencies and Test Mode, Frequency 480 Hz) DP Pin O/P 9 10 11 12 13 14 0 Note: Tone Pin O/P in sine wave, DP Pin O/P in square ware. The normal timing is reduced to 1/8 at tone test mode and 1/48 at pulse test mode. Table 2. (continued) MAXIMUM RATINGS* Symbol VCC VIN VOUT PD Tstg * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) Power Dissipation in Still Air, Storage Temperature Plastic DIP ** Value -0.3 to +6.0 -0.3 to VCC +0.3 -0.3 to VCC +0.3 600 -55 to +125 Unit V V V mW C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. ** Derating: -10 mW/C from 65C to 70C. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) Operating Temperature Min 2.5 0 -10 Max 5.5 VCC +70 Unit V V C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 4 KK91531 DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND, TA = -10 to +70C) Guaranteed Limits Symbol VIH VIL IIN IOL1 IOL2 ICC ICCP Parameter High-Level Input Voltage Low-Level Input Voltage Maximum Input Leakage Current Minimum Output Sink Current, DP Minimum Output Sink Current, DP Maximum Supply Current Standby Maximum Supply Current Pulse VCC =2.5 V, VOL = 0.4V VCC =5.0 V, VOL = 0.4V CE=VCC All outputs unloaded CE=GND All outputs unloaded VCC = 3.5 V FOSC = 3.58 MHz CE=GND All outputs unloaded VCC = 3.5 V FOSC = 3.58 MHz VCC = 5.0 V, VOH = 2.4 V VCC = 5.0 V, VOL = 0.4 V VCC = 2.5 V, RL = 2.2 k VCC = 5.5 V, RL = 2.2 k VCC = 2.5 V, RL = 2.2 k VCC = 5.5 V, RL = 2.2 k 500 1600 1.6 4.0 500 1500 mVp-p 1 3 8 1 Test Conditions Min 0.8 0 Max 1 0.2 1.0 Unit V V A mA mA A mA ICCT Maximum Supply Current Tone 1 mA IOHACK IOLACK VOR VOC Minimum Output Current, ACK Source Minimum Output Current, ACK Sink Single Row Tone Output Amplitude Single Column Tone Output Amplitude mA mA mVp-p 5 KK91531 AC ELECTRICAL CHARACTERISTICS (VCC = 2.5 to 5.5 V, TA = -10 to +70C) Parameter Make/break Ratio, (Figure 1) Make Time, (Figure 1) Break Time, (Figure 1) Inter-Digit Pause Time, T IDP (Figure 1) Predigit Pause, (Figure 1) Minimum Tone Duration, (Figure 1) Minimum Tone Inter-digit Pause, (Figure 1) Tone Output Pre-digit Pause, (Figure 1) Oscillator Set-up Time, (Figure 1) TPDP TB TM 0.2VCC 0.8VCC 0.2VCC 0.8VCC 0.2VCC 0.8VCC 0.2VCC 0.8VCC TMFD TTIDP Symbol Condition Min M/B M/B = VCC M/B = GND M/B = 1/2 M/B = 2/3 M/B = 1/2 M/B = 2/3 M/B = 1/2 M/B = 2/3 M/B = 1/2 M/B = 2/3 31.6 38 63.3 57 750 725 33.2 20 66.5 66.5 Guaranteed Limits Typ 1/2 2/3 3.5 4.2 69.9 63 829 801 36.8 22 73.5 73.5 ms ms ms ms ms ms Max Unit TTPDP TSTART 0 4.75 0.5 5.25 ms ms Figure 1. Switching diagram 6 KK91531 EXPANDED LOGIC DIAGRAM 7 KK91531 N SUFFIX PLASTIC DIP (MS - 001BB) A Dimension, mm 16 9 B Symbol A MIN 18.67 6.1 MAX 19.69 7.11 5.33 1 8 B C F L D F 0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38 0.56 1.78 C -T- SEATING PLANE G H H J N G D 0.25 (0.010) M T K M J K L M N 10 3.81 8.26 0.36 NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. 8 |
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